43. Other Architectures
43.1Spin qubits
The spin of a single electron (or hole) in a semiconductor as the qubit: |↓⟩ and |↑⟩ split by a magnetic field (the Zeeman effect), driven with microwave pulses. The attractions are stacked: nanometer scale (a million qubits fit a square centimeter on paper), coherence up to seconds in isotopically purified silicon, and — strategically the strongest — compatibility with existing CMOS fabrication. Two-qubit gates via exchange coupling of neighboring spins reach ~99–99.5% in small arrays (QuTech, Diraq, RIKEN). This is the platform with the best paper-scalability and the least cloud presence: devices today are single-digit to low-double-digit qubits, a decade behind superconductors in maturity but backed by fabs.
43.2Quantum dots
The container for a spin qubit: an electrostatically defined island in Si/SiGe or GaAs where gate voltages confine exactly one electron. Neighboring dots couple spins through tunable exchange — the two-qubit gate; readout works by spin-to-charge conversion into a neighboring sensor dot. Crossbar architectures promise multiplexed wiring, addressing spin qubits' scaling on paper the way cryo-CMOS does for transmons (39.5). Progress is steady rather than spectacular: 6-qubit arrays with respectable fidelities by 2023–2025. Watch this space if your background is semiconductors — its problems (materials uniformity, yield, variability, cryogenic classical control) are classical engineering problems, which is precisely the platform's bet.
43.3Silicon qubits
The materials story behind 43.1–43.2. Natural silicon carries nuclear spins that dephase electron spins; isotopically enriched ²⁸Si (99.99%+ zero nuclear spin) removes them, giving record coherence — T2 up to seconds. The remaining battle is at interfaces: Si/SiO₂ defects and valley physics, a surface-science problem attacked with fab-grade process control. Intel, imec, Diraq, and QuTech all bet that the semiconductor industry's decades of yield engineering transfer to qubits. For career planning this matters: the platform's openings look like materials science plus device engineering plus classical control software, and its fabrication base exists in far more countries than dilution-refrigerator supply chains do.
43.4Topological approaches
Encode information in a global, topological property of a many-body state — concretely, Majorana zero modes in a superconductor–semiconductor hybrid wire — so that no local perturbation can read or corrupt it: error protection in hardware, potentially collapsing the overheads of Part X by orders of magnitude. The status must be stated honestly: the foundational experiments have a troubled history (a 2021 Nature paper retracted), and the 2025 "Majorana 1" topological-qubit chip claim drew scientific caution rather than acceptance. If real, the payoff is the largest in the field; the current evidence base is the thinnest of any architecture. Highest ceiling, lowest floor — treat claims with the 1.12 checklist.
43.5Cat qubits
Encode a qubit in the two coherent states |−α⟩ and |+α⟩ of a superconducting oscillator, stabilized by engineered two-photon dissipation. The magic is noise bias: bit flips require tunneling between the two wells and are suppressed exponentially in the photon number |α|², while phase flips grow only linearly. Experiments (Alice & Bob, AWS) demonstrate exactly this trade. Why it matters: a hardware noise bias changes error-correction arithmetic — protecting against one error type needs only repetition-like codes rather than full surface codes, slashing the overhead estimates of Part X. The general lesson is bigger than this platform: engineer the error model, not just the error rate.
43.6Hybrid architectures
Real machines will mix platforms by function: long-lived memories (cat qubits, ions), fast processors (transmons), and network links (photons), each doing what it does best. Early hybrids exist today: ions coupled to photons for networked modules (40.8), spin qubits read out through superconducting resonators, transmon memories with engineered dissipation. Modular architectures — many small, high-quality modules connected by teleported photonic entanglement — are the common answer to the wiring, size, and fabrication limits every platform hits when it scales alone (38.6). Expect the fault-tolerant era's machines to be federations rather than monoliths, and expect interconnect engineering — not qubit fabrication — to be the binding constraint.
43.7Comparing physical tradeoffs
The honest summary, with numbers as of this writing — they move yearly, so verify against current calibration pages (38.7). Read the columns as a package: every platform buys its strength with a weakness, and no column is uniformly best.
| Platform | Coherence (T1/T2) | Two-qubit fidelity | Gate speed | Connectivity | Scalability outlook | Cloud access (2026) |
|---|---|---|---|---|---|---|
| Superconducting | ~100 µs / 50–200 µs | 99.0–99.9% | 20–300 ns | nearest-neighbor lattice | limited by wiring and cryogenics | IBM, Rigetti, IQM, OQC |
| Trapped ion | seconds to minutes | 99.9% and above | 10–600 µs | all-to-all within a chain | limited by chain size and shuttling | Quantinuum, IonQ |
| Neutral atom | seconds | 99.0–99.5% | 100 ns–1 µs | reconfigurable 2D geometry | arrays already reach thousands | QuEra, Pasqal |
| Photonic | unlimited in principle; loss dominates | gates are probabilistic | source and detector limited | built from resource states | needs extreme multiplexing | Xanadu; PsiQuantum limited |
| Spin qubits | seconds in ²⁸Si | around 99% | ~100 ns | nearest-neighbor dots | fab-compatible but early | research devices only |
For a remote user without institutional access — your situation — the cloud is the hardware. As of this writing: IBM Quantum offers free and paid superconducting access; AWS Braket fronts Rigetti, IonQ, OQC (superconducting), QuEra (neutral atoms), and more; Azure Quantum fronts Quantinuum and IonQ (ions) and Pasqal (atoms); Xanadu Cloud serves photonic machines. Everything in Parts III–X runs unchanged against any of them — only calibration numbers change.